1. Field of the Invention
The present invention relates to a conducting material to form a via of a green sheet.
As a printed wiring substrate widely used for electronic devices, a multilayer ceramic substrate structured by stacking green sheets has been used with improvement in packing density of semiconductor elements.
Such a multilayer ceramic substrate is generally formed by stacking green sheets having through holes filled with conducting material and then firing such green sheets. In this case, patterns formed between stacked sheets are electrically connected through the vias formed in the through holes. As a conducting material forming vias, copper has been used in order to make small an electrical resistance.
2. Description of the Prior Art
The conventional via forming method will be explained with reference to FIGS. 1 to 2. FIG. 1(a) is a schematic sectional view for explaining the via forming method. A green sheet 11 is provided with a plurality of through holes 12 at the predetermined positions. A mask 14 is stacked on this green sheet 11 and the surface of mask 14 is the coated with copper paste 17 by the squeegee 15. In this process, the through holes 12 are filled with copper paste 17.
Meanwhile, the copper paste 17 is fabricated by the process shown in FIG. 1(b). First, the copper powder 1 in the grain size of about 1 .mu.m and a solvent 16 such as MEK (Methyl Ethyl Ketone) are mixed and kneaded in the mixing process F by a mixer.
A method for fabricating a ceramics circuit substrate using such copper paste has been disclosed, for example, in the Japanese laid-open patent application 63-271995 (laid-open date; Sept. 28, 1988) by H. Yokoyama, M. Tsukada and H. Suzuki.
As shown in FIG. 2(a), the copper paste filling the through holes is in such a condition as allowing clearance between particles 1A of copper powder 1. When the green sheet is fired at the temperature of about 800.degree. C., the copper paste is sintered and particles 1A bind with each other as shown in FIG. 2(b). As a result, the copper paste filling the through holes 12 forms vias 13 as shown in FIG. 2(c). FIG. 2(c) schematically shows the section of vias in parallel to the green sheet surface.
In the case of forming the vias 13 by sintering of the copper paste many organic materials are included and therefore such organic materials are vaporized during the sintering process. If such vaporization is generated at the latter process of firing for the green sheet, pores 13A are formed, as shown in FIG. 2(c), at the boundary of internal surface of through hole 12 and via 13 and within the via 13, and binding between the particles becomes non-dense, resulting in a problem that electrical resistance of via 13 becomes high.
Moreover, another problem described hereafter will also be generated.
FIG. 2(d) is a schematic sectional view of a multilayer ceramic substrate 18 fabricated by sintering a plurality of stacked green sheets 11.
When expansion of vapor of organic materials during the firing process occurs, a mound G1 of a pattern 10 formed on the surface of green sheet 11 is generated at the position of via 13 and peeling G2 of a pattern is also generated. As a result, the vias 13 are no longer connected to the pattern 10 accurately.